The invention relates in general to semiconductor processing and more particularly to techniques and structures for front surface gettering of metallic contamination or impurities in integrated circuits.
In the processing of some semiconductor integrated circuits an epitaxial layer is typically grown on a semiconductor substrate. Growing an epitaxial layer that is free of imperfections, defects and impurities is required to manufacture high quality semiconductor devices. The quality of an epitaxial layer is determined by the quality of the substrate and the epitaxial growth process. Impurities in the substrate will propagate from the substrate to the epitaxial layer during the device fabrication.
Many defects are also generated during the fabrication of Silicon On Insulator (SOI) structures formed by Separation of Silicon by Implantation of Oxygen (SIMOX) method. SIMOX structures are comprised of a substrate, an insulating layer on the substrate, and a top silicon layer on the insulating layer. The insulating layer is used to electrically isolate an integrated circuit fabricated in the top silicon layer from the substrate silicon. This type of structure is typically formed by doing implantation of oxygen into the wafer at a very high dose level. The high beam current needed to achieve the high dose level tends to sputter material of the implant chamber, thus causing metallic contamination.
After implantation the wafer typically undergoes a high temperature anneal process to repair the oxygen implant related damage. This anneal process is frequently done at a temperature of 1300 degrees C. or higher. At such a high temperature, some metallic impurity will come from the diffusion process and diffuse into the silicon substrate.
Once the impurity from the implantation process and the anneal process gets into the silicon wafer it is very difficult to remove it. In the past the approach has been in general to use backside gettering to remove impurities. This approach includes the creation of damage sites on the backside of the wafer. The damage sites on the backside of the wafer may be created by mechanical means, by phosphorous diffusion, by backside nitride deposition, by depositing polysilicon on the backside of the wafer or by ion implantation into the backside of the wafer. Regardless of the specific method the objective is to create gettering sites or damage sites. Once the gettering sites have been created the wafer is put through a high temperature anneal process. During this process the impurities will tend to diffuse to the damage sites and be trapped there.
The method just described does not work for an SOI device, because the silicon layer where the integrated circuits will be fabricated is located on a buried silicon dioxide layer and the damage sites have been created on the backside of the wafer which is on the opposite side of the silicon dioxide layer. The impurities are therefore not able to diffuse through the buried layer to the damage sites. Similarly the method described is not effective for silicon on sapphire (SOS) structures.
Thus a need exists for an effective method of gettering contaminants from silicon devices and a particular need exists for gettering contaminants from SOI and SOS devices.